Instance Constructors
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new
ManagerXactTrackerIO()
Value Members
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final
def
!=(arg0: AnyRef): Boolean
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final
def
!=(arg0: Any): Boolean
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def
##(b: Node): Node
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final
def
##(): Int
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def
+(other: Bundle): Bundle
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def
:=(that: Data): Unit
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def
<>(src: Node): Unit
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final
def
==(arg0: AnyRef): Boolean
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final
def
==(arg0: Any): Boolean
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def
===[T <: Data](right: T): Bool
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def
W0Wtransform(): Unit
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def
^^(src: Node): Unit
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val
_id: Int
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def
_isComplementOf(x: Node): Boolean
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def
addConsumers(): Unit
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def
apply(name: String): Data
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-
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final
def
asInstanceOf[T0]: T0
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-
def
assign(src: Node): Unit
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def
canCSE: Boolean
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lazy val
chiselName: String
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var
clock: Clock
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var
cntrIdx: Int
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def
colonEquals(src: Bundle): Unit
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def
colonEquals[T <: Data](that: Iterable[T]): Unit
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def
colonEquals(that: Bits): Unit
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var
comp: proc
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var
component: Module
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def
componentOf: Module
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val
consumers: LinkedHashSet[Node]
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def
contains(name: String): Boolean
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def
dblLitValue: Double
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var
depth: Int
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var
driveRand: Boolean
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lazy val
elements: LinkedHashMap[String, Data]
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lazy val
emitIndex: Int
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final
def
eq(arg0: AnyRef): Boolean
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def
equals(that: Any): Boolean
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def
equalsForCSE(x: Node): Boolean
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def
extract(b: Bundle): List[Node]
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def
extract(widths: Array[Int]): List[UInt]
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def
finalize(): Unit
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def
flatten: Array[(String, Bits)]
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-
def
floLitValue: Float
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def
forceMatchingWidths: Unit
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def
fromMap(elemmap: Map[String, Data]): ManagerXactTrackerIO.this.type
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final
def
getClass(): Class[_]
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def
getLit: Literal
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def
getNode: Node
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def
getWidth(): Int
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def
getWidthW(): Width
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val
has_acquire_conflict: Bool
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val
has_acquire_match: Bool
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val
has_release_match: Bool
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def
hashCode(): Int
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def
hashCodeForCSE: Int
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def
ifin(dummy: Int = 0): Finish
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def
ignt(dummy: Int = 0): GrantToDst
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def
illegalAssignment(that: Any): Unit
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val
incoherent: Vec[Bool]
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def
infer: Boolean
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var
inferWidth: (⇒ Node) ⇒ Width
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def
init(n: String, w: Int, ins: Node*): Node
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def
init(n: String, widthFunc: (⇒ Node) ⇒ Width, ins: Node*): Node
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def
initOf(n: String, widthfunc: (⇒ Node) ⇒ Width, ins: Iterable[Node]): Node
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val
innerBeatAddrBits: Int
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val
innerByteAddrBits: Int
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val
innerDataBeats: Int
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val
innerDataBits: Int
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def
innerTLParams: Parameters
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val
inputs: ArrayBuffer[Node]
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def
iprb(dummy: Int = 0): ProbeToDst
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def
isByValue: Boolean
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def
isDirectionless: Boolean
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lazy val
isInObject: Boolean
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lazy val
isInVCD: Boolean
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final
def
isInstanceOf[T0]: Boolean
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def
isIo: Boolean
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def
isIo_=(isIo: Boolean): Unit
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def
isKnownWidth: Boolean
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final
def
isLit: Boolean
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def
isReg: Boolean
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def
isTopLevelIO: Boolean
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var
isTypeNode: Boolean
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def
isUsedByClockHi: Boolean
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var
isWidthWalked: Boolean
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val
line: StackTraceElement
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def
litOf: Literal
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def
litValue(default: BigInt): BigInt
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def
matchWidth(w: Width): Node
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def
maybeFlatten: Seq[Node]
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var
modified: Boolean
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val
nAcquireTransactors: Int
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val
nReleaseTransactors: Int
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val
nTransactors: Int
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var
name: String
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var
nameHolder: nameable
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def
nameIt(path: String, isNamingIo: Boolean): Unit
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var
named: Boolean
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final
def
ne(arg0: AnyRef): Boolean
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def
needWidth(): Int
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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def
oacq(dummy: Int = 0): Acquire
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def
ognt(dummy: Int = 0): Grant
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val
outerBeatAddrBits: Int
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val
outerByteAddrBits: Int
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val
outerDataBeats: Int
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val
outerDataBits: Int
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def
outerTLParams: Parameters
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def
params: Parameters
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var
parents: LinkedHashSet[Node]
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def
printTree(writer: PrintStream, depth: Int, indent: String): Unit
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var
prune: Boolean
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def
removeTypeNodes(): Unit
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def
replaceTree(newNode: Node): Unit
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def
review(): Unit
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var
sccIndex: Int
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var
sccLowlink: Int
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def
setIsTypeNode: Unit
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def
setName(n: String): Unit
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def
setWidth(w: Int): Unit
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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def
toBits(): UInt
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def
toBool(): Bool
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lazy val
toNode: Node
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def
toString(): String
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def
usesInClockHi(i: Node): Boolean
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val
view: Seq[String]
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final
def
wait(): Unit
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final
def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
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var
width_: Width
Inherited from UsesParameters
Inherited from Bundle
Inherited from Aggregate
Inherited from Data
Inherited from Node
Inherited from nameable
Inherited from AnyRef
Inherited from Any