riscv.h File Reference

RISC-V Definitions. More...

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Macros
#define	RISCV_XLEN   64
#define	LREG   ld
#define	SREG   sd
#define	REGBYTES   8
#define	READ_CSR(REG)
#define	WRITE_CSR(REG, VAL)
#define	SWAP_CSR(REG, VAL)
#define	SET_CSR_BITS(REG, BIT)
#define	CLEAR_CSR_BITS(REG, BIT)

Detailed Description

RISC-V Definitions.

This header file provides common definitions and operations for RISC-V core programming. It includes memory register attributes, bit operation definitions, RISC-V specific definitions, and common enumerations for state and status values.

The memory register attributes define volatile permissions for read-only, write-only, and read/write access. The bit operation definitions provide macros for setting, clearing, reading, and writing specific bits in a register. The RISC-V specific definitions include macros for reading and writing control and status registers (CSRs), as well as operations to swap, set, and clear specific bits in a CSR. The common definitions include enumerations for state values (such as RESET and SET), and status values (such as OK and ERROR).

Note

This file should be included to access RISC-V core-specific definitions and perform common operations.